GRANT(PI & MEMBERS)

19

PUBLICATIONS

29

INDEXED PUBLICATION

16

TOTAL STUDENTS

H-INDEXED (SCOPUS)

CITATIONS (SCOPUS)

Grant (PI)

INDUSTRY GRANTS
4
INTERNATIONAL GRANTS
3
NATIONAL GRANTS
1
UNIVERSITY FUND
1
TOTAL

Publications

INDEXED PUBLICATION
16
NON-INDEXED PUBLICATION
2
OTHERS PUBLICATION
11
TOTAL

Supervisions

MASTER
21
PHD
10
TOTAL

Legend : SPONSOR TYPE OF GRANT

Grant Name Year
FABRICATION, MEASUREMENT AND ANALYSIS FOR ANALOG CMOS IC FAILURE VALIDATION.
RUG OF UTM Tier 2
2012
Evaluation & Development Of Analog Integrated Circuits Performance'S Macromodel For Nanometer Transistor
MINISTRY OF EDUCATION Fundamental Research Grant Scheme
2011
Test Compaction Method to Reduce the Volume of Data for Sequential Circuit
INTEL TECHNOLOGY SDN. BHD. Contract
2007
Device Scalling on Analog Power Consumption
INTEL TECHNOLOGY SDN. BHD. Contract
2007
Resistive Contacts & Resistive Open in CMOS
INTEL TECHNOLOGY SDN. BHD. Contract
2005
Resistive Contacts & Resistive Open in CMOS
Contract
2001
The Design of Low Power RF Transceiver using Mixed Signal IC Design Technique
MINISTRY OF ENERGY, SCIENCE, TECHNOLOGY, ENVIRONEMNT AND CLIMATE CHANGE (MESTECC) Sciencefund
2001
A Study in Signature Analyzer for Design for Test
INTEL TECHNOLOGY SDN. BHD. Contract
1999
Characterisation and Modeling of Gate Oxide Short (GOS) Defect Model for CMOS Deep Sub-Micron/Nanoelectronic Technology
INTEL TECHNOLOGY SDN. BHD. Contract
1999
Public Key Crytosystem Hardware and Software
Contract
1996
Design of a Mixed-Mode, Testable VLSI Neuroprocessor Chip, With Built-in Current Test Sensor Structure, to be Applied in Computer Networking Hardware
MINISTRY OF ENERGY, SCIENCE, TECHNOLOGY, ENVIRONEMNT AND CLIMATE CHANGE (MESTECC) Sciencefund
1996
Rechargeable Alkaline Manganese Battery RD on Cycle And Performance Improvement
Contract
1995
Pengujian Litar Bersepadu
INTEL TECHNOLOGY SDN. BHD. Contract
1994
Low Voltage Integrated Circuit Failure Analysis.
Short Term
1992

Legend : PUBLICATION CATEGORY TYPE OF AUTHORS

Publication Name Year
Cntfet Based Voltage Mode Miso Active Only Biquadratic Filter For Multi‑Ghz Frequency Applications
CIRCUITS SYSTEMS AND SIGNAL PROCESSING
Publication In Web Of Science UTM FIRST AUTHOR
2021
A Comparative Analysis Of Lfsr Cascading For Hardware Efficiency And High Fault Coverage In Bist Applications
PROCEEDING OF ASIAN TEST SYMPOSIUM
Publication In Web Of Science UTM FIRST AUTHOR
2020
Adaptive Random Testing With Total Cartesian Distance For Black Box Circuit Under Test
INDONESIAN JOURNAL OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE
Publication In Scopus UTM FIRST AUTHOR
2020
A Cntfet-C First Order All Pass Filter
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Publication In Web Of Science UTM FIRST AUTHOR
2019
Design Of Voltage Mode Electronically Tunable First Order All Pass Filter In +/- 0.7 V 16 Nm Cnfet Technology
ELECTRONICS
Publication In Web Of Science UTM FIRST AUTHOR
2019
Horizontal Diversity In Test Generation For High Fault Coverage
TURKISH JOURNAL OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCES
Publication In Web Of Science UTM FIRST AUTHOR
2018
Pole-Zero Estimation And Analysis Of Op-Amp Design With Negative Miller Compensation
2017 6TH INTERNATIONAL CONFERENCE ON MODERN CIRCUITS AND SYSTEMS TECHNOLOGIES, MOCAST 2017
Publication In Scopus UTM FIRST AUTHOR
2017
Programmable Gain And Bandwidth Op-Amp Using Controllable Input Stage Tail Current
2017 INTERNATIONAL ELECTRICAL ENGINEERING CONGRESS
Proceedings UTM FIRST AUTHOR
2017
Cnfet Based Reconfigurable First Order Filter
9TH IEEE-GCC CONFERENCE AND EXHIBITION (GCCCE)
Conference Paper UTM FIRST AUTHOR
2017

ELECTRONIC WORKSHOP FOR SCHOOL STUDENTS
Modules / Manual CO-AUTHOR
2017
Test Pattern Generation For Integrated Circuit Test Using Distance Between Vectors
INTERNATIONAL JOURNAL OF SCIENCE AND RESEARCH
Journal Article Non Citation-Indexed UTM FIRST AUTHOR
2016
Rgb Led Driver Circuit Design For And Optical Fiber Sensor System
INT CONF. ON ELECTRICAL/ELECTRONICS, COMPUTER, TELECOMMUNICATIONS AND INFORMATION TECHNOLOGY
Conference Paper UTM FIRST AUTHOR
2016
Simulation Of Power Measurement Of Sequential Adiabatic Circuit
INTERNATIONAL CONFERENCE ON COMPUTATIONAL SCIENCE AND ENGINEERING 2016
Proceedings UTM FIRST AUTHOR
2016
Low Voltage Cmos Switch For High Speed Rail To Rail Sampling
CIRCUITS, SYSYTEMS AND SIGNAL PROCESSING
Publication In Scopus UTM FIRST AUTHOR
2016
Scalalable Antirandom Testing
INTERNATIONAL JOURNAL INNOVATIVE SCIENCE AND MODERN ENGINEERING
Journal Article Non Citation-Indexed UTM FIRST AUTHOR
2015
Introductory Laboratories In Semiconductor Devices Using The Digilent Analog Discovery
PROCEEDINGS OF 2015 12TH INTERNATIONAL CONFERENCE ON REMOTE ENGINEERING AND VIRTUAL INSTRUMENTATION, REV 2015
Publication In Scopus UTM FIRST AUTHOR
2015
Pre-Charge Solution For Low-Power, Area-Efficient Sar Adc
IEICE ELECTRONICS EXPRESS
Publication In Web Of Science UTM FIRST AUTHOR
2015
A High Gain And Low Flicker Noise Cmos Mixer With Low Flicker Noise Corner Frequency Using Tunable Differential Active Inductor
WIRELESS PERSONAL COMMUNICATION
Publication In Scopus UTM FIRST AUTHOR
2014
A Wide Tuning Range Voltage Controlled Oscillator With A High Tunable Active Inductor
WIRELESS PERSONAL COMMUNICATION
Publication In Web Of Science UTM FIRST AUTHOR
2014
High-Linear,Energy-Efficient Andarea-Efficient Switchingalgorithm For High-Speedsaradcs
MICROELECTRONICS JOURNAL
Publication In Scopus UTM FIRST AUTHOR
2014
Second-Stage Tuning Procedure For Analogue Cmos Design Reuse Methodology
Electronics Letters
Publication In Web Of Science UTM FIRST AUTHOR
2012
Cmos Source Degenerated Differential Active Inductor
Electronics Leters
Publication In Web Of Science INDIVIDUAL AUTHOR
2008
Compact, High-Q, And Low-Current Dissipation Cmos Differential Active Inductor
IEEE Microwave and Wireless Components Letters
Conference Paper INDIVIDUAL AUTHOR
2008
A 2.4 Ghz Cmos Tunable Image-Rejection Low-Noise Amplifier With Active Inductor
Advances In Microelectronics
Book Chapter INDIVIDUAL AUTHOR
2008
Design Of Cmos Tunable Image-Rejection Low-Noise Amplifier With Active Inductor
VLSI Design
Publication In Scopus INDIVIDUAL AUTHOR
2008
Two Stage Integrated Class-F Rf Power Amplifier
International Symposium on Integrated Circuits ISIC-2007
Conference Paper INDIVIDUAL AUTHOR
2007
The Effect Of Mosfet Second-Order Nonlinearity On Active Inductor-Based Oscillators
Asia Pacific Conference on Applied Electromagnetics
Conference Paper INDIVIDUAL AUTHOR
2007
Characterization And Model Development Of Cmos Floating Gate Defect (Fgd)
2009 Asia-Pacific Conference on Applied Electromagnetics
Conference Paper INDIVIDUAL AUTHOR
2007
Digital Detection Of Gate Leakage For Analog Cmos Circuit
IEEE Regional Symposium on Microelectronics (RSM2007)
Conference Paper INDIVIDUAL AUTHOR
2007

Legend : IP CATEGORY IP LEVEL

Intellectual Property Name Grant Register No. IP Level IP Category
ACTIVE INDUCTOR CIRCUIT HAVING TUNEABLE INDUCTANCE MY-165764-A NATIONAL PATENT
METHOD AND CIRCUIT FOR IMPROVING LINEARITY OF DIRECT CURRENT REGULATED CIRCUITS MY-160318-A NATIONAL PATENT
A SYSTEM FOR GENERATING TEST SEQUENCE NATIONAL PATENT

Legend : SESSION LEVEL OF STUDY STATUS SUPERVISION LEVEL

Supervision List
HAU YUAN WEN
SYSTEMC - BASED DESIGN FRAMEWORK FOR AN EMBEDDED SYSTEM IMPLEMENTED AS SYSTEM-ON-CHIP
PHD GRADUATED CO-SUPERVISOR 2009
LER CHUN LEE
DESIGN OF COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR RADIO FREQUENCY MODULES WITH ACTIVE INDUCTOR USING STANDARD COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR PROCESS
PHD GRADUATED SUPERVISOR 2009
AHMAD FAISAL BIN ADNAN
ACTIVE INDUCTANCE MULTIPLIER
PHD ON GOING SUPERVISOR
HOJJAT BABAEI KIA
RADIO FREQUENCY CIRCUIT DESIGN BASED ON VARIABLE RESISTANCE ACTIVE INDUCTOR
PHD GRADUATED SUPERVISOR 2013
JAFAR TORFIFARD
HIGH PERFORMANCE OPERATIONAL AMPLIFIER BASED ON ADAPTIVE AND SUBTHRESHOLD BIASING TECHNIQUES
PHD GRADUATED SUPERVISOR 2013
MUHAMMAD SADIQ BIN SAHARI
ENHANCED TEST PATTERN GENERATOR FOR BLOCK BOX TESTING
PHD GRADUATED SUPERVISOR 2015
SAHAR SARAFI
HIGH SPEED - ENERGY EFFICIENT SUCCESSIVE APPROXIMATION ANALOG TO DIGITAL CONVERTER USING TRI-LEVEL SWITCHING
PHD GRADUATED SUPERVISOR 2015
SELVAKUMAR A/L SIVARAJAH

MASTER NOT ACTIVE MAINFRAME SYSTEMS STUDENTS SUPERVISOR
LEONG MUN HON
DIGITAL MODELLING TECHNIQUE FOR MIXED MODE CIRCUITS
MASTER GRADUATED SUPERVISOR 2004
CHEOW KWEE SIONG
ANALYSIS AND MODEL DEVELOPMENT OF GATE OXIDE SHORT (GOS) FOR DEEP SUBMICRON CMOS TRANSISTOR
MASTER GRADUATED SUPERVISOR 2005
HAU YUAN WEN
SYSTEMC - BASED DESIGN FRAMEWORK FOR AN EMBEDDED SYSTEM IMPLEMENTED AS SYSTEM-ON-CHIP
MASTER GRADUATED CO-SUPERVISOR 2005
WARSUZARINA BINTI MAT JUBADI

MASTER GRADUATED SUPERVISOR 2005
RAFIQ SHARMAN B. KHAMIS @ ROSLEE
DESIGN OF CMOS COMMON GATE LOW NOISE AMPLIFIER WITH ON - CHIP ACTIVE INDUCTOR
MASTER GRADUATED SUPERVISOR 2006
MOHD AZMI BIN ISMAIL

MASTER FAIL AND DISMISSAL SUPERVISOR
LIEW ENG YEW

MASTER FAIL AND DISMISSAL SUPERVISOR
LEE LI YING

MASTER GRADUATED SUPERVISOR 2007
HUANG MIN ZHE
INTEGRATED CLASS POWERAMPLIFIER FOR RADIO FREQUENCY APPLICATION AT 2.4 GHZ
MASTER GRADUATED SUPERVISOR 2007
WONG YAN CHIEW
CHARACTERISTIC AND MODEL DEVELOPMENT OFA CMOS FLOATING GATE DEFECT.
MASTER GRADUATED SUPERVISOR 2008
MUHAMAD FAISAL BIN IBRAHIM
DESIGN FOR TESTABILITY FOR COMPLEMENTARY METAL OXIDE SEMICONDUCTOR ANALOG CIRCUIT TO DETECT PARAMETRIC VARIATION OF GATE
MASTER GRADUATED SUPERVISOR 2008
MOHAMAD ASFA HUSAINI BIN ZAKARIA
IMPACT OF NANOMETER TRANSISTOR ON ANALOG PERFORMANCE
MASTER GRADUATED SUPERVISOR 2010
HASMAYADI BIN ABDUL MAJID
A READOUT CIRCUIT FOR MEMS BASED MOISTURE SENSOR
MASTER GRADUATED SUPERVISOR 2011
MUHAMAD RIDZUAN BIN RADIN MUHAMAD AMIN
DEVELOPMENT OF ADAPTIVE ROBOT USING REINFORCEMENT LEARNING
MASTER GRADUATED SUPERVISOR 2011
ABDULLAH ABDULHAMEED GUMAAN ABDULHAMEED
DESIGN OF LOW NOISE AMPLIFIER (LNA) USING ACTIVE INDUCTOR (AI) BASED ON 32 NM PROCESS
MASTER GRADUATED SUPERVISOR 2013
AHMAD FAISAL BIN ADNAN
SYSTEMATIC TUNING PROCEDURE FOR ANALOG DESIGN REUSE METHODOLOGY
MASTER GRADUATED SUPERVISOR 2013
MOHAMMAD FAIZI BIN OTHMAN

MASTER GRADUATED SUPERVISOR 2015
NG POH PIN

MASTER FAIL AND DISMISSAL SUPERVISOR
ARBAB ALAMGIR

MASTER GRADUATED SUPERVISOR 2016
NURUL AISYAH NADIAH BINTI ZAINAL ABIDIN
DIGITAL LOGIC CIRCUIT DESIGN USING ADIABATIC APPROACH
MASTER GRADUATED SUPERVISOR 2017