GRANT(PI & MEMBERS)
39
PUBLICATIONS
61
INDEXED PUBLICATION
46
TOTAL STUDENTS
H-INDEXED (SCOPUS)
CITATIONS (SCOPUS)
Grant (PI)
INDUSTRY GRANTS
3
NATIONAL GRANTS
5
UNIVERSITY FUND
8
TOTAL
Publications
INDEXED PUBLICATION
46
NON-INDEXED PUBLICATION
4
OTHERS PUBLICATION
11
TOTAL
Supervisions
MASTER
23
PHD
10
TOTAL
Legend : SPONSOR TYPE OF GRANT
Grant Name | Year |
---|---|
Enhancing Testability through Strategic Test Point Insertion in Logic Circuits RUG OF UTM UTM Encouragement Research |
2024 |
COE/RG 2.2 : High-performance Cache Coherence Network-on-chip for Artificial Intelligence System-on-Chip RUG OF UTM Flagship CoE/RG |
2022 |
IC Design and Optimization of RISC-V and Block Cipher SkyeChip Sdn. Bhd. Contract |
2022 |
INVESTIGATION OF MEMORY PHYSICAL UNCLONABLE FUNCTION IN IOT NODE AUTHENTICATION MINISTRY OF EDUCATION Fundamental Research Grant Scheme |
2022 |
Three-Dimensional Stacked Integrated Circuit Test Architecture and Test Scheduling Optimization RUG OF UTM UTM Fundamental Research |
2022 |
Analysis of Air Quality Monitoring System based on Internet of Things Asia Technological University Network (ATU-Net) Young Researcher Grant (YRG) International Grant |
2022 |
Enhancing Predictive Algorithm for Predicting Paddy Yield based on Soil Profiling and Machine Learning model RUG OF UTM UTM Encouragement Research |
2021 |
Lightweight Secure RISC-V Processor for Smart Home in Internet of Things RUG OF UTM UTM Encouragement Research |
2021 |
Hybrid of BIST and Non Scan Design for Testability Method at Register Transfer Level RUG OF UTM UTM Encouragement Research |
2019 |
STATISTICAL ASSOCIATION OF TONGUE CHARACTERISTICS OF PERSON DESCRIBED USING ORIENTAL MEDICINE PRACTICES AND THEIR CORRESPONDEDING ALLOPATHIC HEALTH STATUS MINISTRY OF EDUCATION Networking Grant |
2019 |
FPGA Prototype Development and Pre-Clinical Evaluation of Intelligent Electrocardiogram Monitoring Device for Early Heart Disease Detection and Prevention MINISTRY OF EDUCATION Prototype Development Research Grant Scheme |
2019 |
COMPUTER AIDED DETECTION/DIAGNOSIS OF LIVER PATHOLOGIES USING CT IMAGES FOR TREATMENT PLANNING AND MONITORING OF LIVER CANCER PATIENTS RUG OF UTM Professional Development Research University |
2019 |
Hardware Acceleration for Extreme Learning Machine on Smart Chip FPGA RUG OF UTM Tier 2 |
2018 |
Hybrid Reconfigurable Transmitting Power and Adaptive Packet Relocator Scheme in Wireless Network-on-Chip RUG OF UTM Potential Academic Staff |
2017 |
HARDWARE ACCELERATION OF EFFICIENT TONGUE DIAGNOSIS DEVICE RUG OF UTM Tier 1 |
2017 |
A Novel and Smart Arrhythmia Analyzer Design based on Enhanced Artificial Intelligence Algorithm for Cardiac Home Monitoring MINISTRY OF EDUCATION Transdiscplinary Research Grant Scheme |
2016 |
BUILT-IN SELF-TEST FOR FUNCTIONAL REGISTER-TRANSFER-LEVEL DESIGN USING ASSIGNMENT DECISION DIAGRAM RUG OF UTM Encouragement Grant |
2015 |
Fundamental Study of Finite-State-Machine with Data Path for Power-Aware Three-Dimensional Integrated Circuits MINISTRY OF EDUCATION Fundamental Research Grant Scheme |
2014 |
LOW-POWER DEPENDABLE SYSTEM-ON-CHIP FOR MPEG4 PROCESSING RUG OF UTM Tier 1 |
2014 |
Web-based Telecardiology Development for UTM Pilot Case Study RUG OF UTM Flagship |
2014 |
HARDWARE - FPGA BASED ENABLED CONSTRAINT RANDOM VALIDATION (CRV) COLLABORATIVE RESEARCH IN ENGINEERING, SCIENCE & TECHNOLOGY CENTER (CREST) Non Goverment Agency |
2014 |
Multiprocessor System-On-Chip Based On Low Latency Network-On-Chip For High-Throughput Traffic Classification On NetFPGA MINISTRY OF EDUCATION Fundamental Research Grant Scheme |
2013 |
STUDY OF INDUSTRY LEADING ATE (AUTOMATED TEST EQUIPMENT) AND ENABLING A TOTAL TEST - PLATFORM SOLUTION FOR ALTERA'S PRODUCTION TESTING COLLABORATIVE RESEARCH IN ENGINEERING, SCIENCE & TECHNOLOGY CENTER (CREST) Non Goverment Agency |
2013 |
A Design Framework for Multi-Processor System-on-Chip (MPSoC)Architecture Design-Space Exploration in Biomedical Application: Human Heart ECG Monitoring and Processing MINISTRY OF ENERGY, SCIENCE, TECHNOLOGY, ENVIRONEMNT AND CLIMATE CHANGE (MESTECC) Sciencefund |
2013 |
Technology Exploration of On-Line Cardiac Monitoring and Diagnostic Medical Device in Telecardiology RUG OF UTM Flagship |
2013 |
Parameterized Thermal Simulator for Temperature-Aware Testing Methodology Tier 2 |
2012 |
Adaptive Online Testing For MPEG Processing On Network-On-Chip MINISTRY OF ENERGY, SCIENCE, TECHNOLOGY, ENVIRONEMNT AND CLIMATE CHANGE (MESTECC) Sciencefund |
2012 |
Multi-Constrained System-on-Chip (SoC) Test Planning Framework based on Enhanced 3-D Floorplanning RUG OF UTM Tier 2 |
2011 |
A Dependable System-on-Chip Architecture for Image Processing UNIVERSITI TEKNOLOGI MALAYSIA UTM R&D Fund |
2011 |
A New Design-For_testability (DFT) Technique for a System-on-Chip (Soc) UNIVERSITI TEKNOLOGI MALAYSIA Fund Without Provision |
2008 |
Development of High-Level Design-for-Testability Method and Digital Testing System for Education. MINISTRY OF ENERGY, SCIENCE, TECHNOLOGY, ENVIRONEMNT AND CLIMATE CHANGE (MESTECC) Sciencefund |
2008 |
High Level Design Design for Testability Method for Assignment Decision Diagram UNIVERSITI TEKNOLOGI MALAYSIA Institutional Research Grant Scheme |
2008 |
Legend : PUBLICATION CATEGORY TYPE OF AUTHORS
Publication Name | Year |
---|---|
Improving Hardware Trojan Detection Coverage By Utilizing Features At Different Abstraction Levels
JOURNAL OF ADVANCED RESEARCH IN APPLIED SCIENCES AND ENGINEERING TECHNOLOGY Publication In Scopus FIRST UTM CORRESPONDING AUTHOR |
2023 |
Scalable Off-Chain Blockchain For Vehicular Network
2022 1ST INTERNATIONAL CONFERENCE ON INFORMATION SYSTEM AND INFORMATION TECHNOLOGY, ICISIT 2022 Publication In Scopus UTM FIRST AUTHOR |
2022 |
Efficient Hardware-Accelerated Pseudoinverse Computation Through Algorithm Restructuring For Parallelization In High-Level Synthesis
INTERNALTIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS Publication In Web Of Science CORRESPONDING AUTHOR |
2022 |
Use Of Learning Approaches To Predict Clinical Deterioration
In Patients Based On Various Variables: A Review Of The Literature
ARTIFICIAL INTELLIGENCE REVIEW Publication In Web Of Science CO-AUTHOR |
2022 |
Rtfog: A Real-Time Fpga-Based Fog Node With Remote Dynamically Reconfigurable Application Plane For Fog Analytics Redeployment
IEEE TRANSACTIONS ON GREEN COMMUNICATIONS AND NETWORKING Publication In Web Of Science CO-AUTHOR |
2022 |
Test Scheduling Of Soc By Using Dynamic Voltage Frequency Scaling (Dvfs) Technique
EMERGING ADVANCES IN INTEGRATED TECHNOLOGY Journal Article Non Citation-Indexed UTM FIRST AUTHOR |
2022 |
An Fpga-Based Network System With Service-Uninterrupted
Remote Functional Update
INTERNATIONAL JOURNAL OF ELECTRICAL AND COMPUTER ENGINEERING Publication In Scopus CO-AUTHOR |
2021 |
Carbon Nanotube Field Effect Transistor (Cntfet) And Resistive Random Access Memory
(Rram) Based Ternary Combinational Logic Circuits
ELECTRONICS Publication In Web Of Science UTM FIRST AUTHOR |
2021 |
Register-Transfer-Level Features For Machine-Learning-Based Hardware Trojan Detection
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS, COMMUNICATIONS AND COMPUTER SCIENCES Publication In Web Of Science CORRESPONDING AUTHOR |
2020 |
A Review Of Breast Boundary And Pectoral Muscle
Segmentation Methods In Computer-Aided
Detection/Diagnosis Of Breast Mammography
ARTIFICIAL INTELLIGENCE REVIEW Publication In Web Of Science UTM FIRST AUTHOR |
2020 |
Fpga-Assisted Assertion-Based Verification
Platform
JOURNAL OF TELECOMMUNICATION, ELECTRONIC AND COMPUTER ENGINEERING (JTEC) Journal Article Non Citation-Indexed UTM FIRST AUTHOR |
2020 |
Machine-Learning-Based Multiple Abstraction Level Detection Of Hardware Trojan Inserted At
Register-Transfer Level
IEEE ASIAN TEST SYMPOSIUM Publication In Web Of Science UTM FIRST AUTHOR |
2019 |
Accelerating Extreme Learning Machine On Fpga By Hardware Implementation Of Given Rotation - Qrd
INTERNATIONAL JOURNAL OF INTEGRATED ENGINEERING Publication In Scopus CO-AUTHOR |
2019 |
Net Classification Based On Testability And Netlist
Structural Features For Hardware Trojan Detection
IEEE ASIAN TEST SYMPOSIUM Publication In Web Of Science UTM FIRST AUTHOR |
2019 |
Review Of Machine Learning Based Hardware Trojan Detection Methods
DEFENCE S AND T TECHNICAL BULLETIN Publication In Scopus UTM FIRST AUTHOR |
2019 |
Classification Of Trojan Nets Based On Scoap Values Using Supervised Learning
2019 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) Publication In Web Of Science UTM FIRST AUTHOR |
2019 |
Drdrm: A Puf-Based Dynamically Reconfigurable Drm Mechanism For Fpga-Based Platform
THE SIXTH INTERNATIONAL SYMPOSIUM ON COMPUTING AND NETWORKING Publication In Scopus UTM FIRST AUTHOR |
2018 |
Performance Comparison Of Colour Correction And Colour Grading Algorithm For Medical Imaging Applications
INTERNATIONAL CONFERENCE ON ELECTRIC, ELECTRONIC & COMPUTER ENGINEERING: INTCEECE 2018 Proceedings CO-AUTHOR |
2018 |
Hardware Transactional Memory Architecture With Adaptive Version Management For Multi-Processor Fpga Platforms
JOURNAL OF SYSTEMS ARCHITECTURE Publication In Web Of Science CO-AUTHOR |
2017 |
A Customized Reconfiguration Controller With
Remote Direct Icap Access For Dynamically
Reconfigurable Platform
TELKOMNIKA (TELECOMMUNICATION, COMPUTING, ELECTRONICS AND CONTROL) Publication In Scopus CO-AUTHOR |
2017 |
Ping-Lock Round Robin Arbiter
MICROELECTRONICS JOURNAL Publication In Web Of Science CO-AUTHOR |
2017 |
Integrated Low-Power Gating Scan Cell For Test Power Minimization
ADVANCES IN MICROELECTRONICS: REVIEWS Book Chapter UTM FIRST AUTHOR |
2017 |
A Fast Svm-Based Tongue'S Colour Classification Aided By K-Means Clustering Identifiers And Colour Attributes As Computer-Assisted Tool For Tongue Diagnosis
JOURNAL OF HEALTHCARE ENGINEERING Publication In Web Of Science UTM FIRST AUTHOR |
2017 |
Test Register Insertion At Rtl Based On Reduced Bist
JURNAL TEKNOLOGI Publication In Web Of Science CO-AUTHOR |
2017 |
Small Area Implementation For Optically Reconfigurable Gate Array Vlsi: Fft Case
JOURNAL OF SCIENCE & INDUSTRY RESEARCH Publication In Web Of Science CO-AUTHOR |
2017 |
Hpfog: A Fpga-Based Fog Computing Platform
NETWORKING, ARCHITECTURE, AND STORAGE (NAS), 2017 INTERNATIONAL CONFERENCE ON Publication In Scopus CO-AUTHOR |
2017 |
The Design And Implementation Of A Low-Power Gating Scan Element In 32/28 Nm Cmos Technology
JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS Publication In Scopus CORRESPONDING AUTHOR |
2017 |
An Integrated Dft Solution For Power Reduction In Scan Test Applications By Low Power Gating Scan Cell
INTEGRATION, THE VLSI JOURNAL Publication In Web Of Science CORRESPONDING AUTHOR |
2017 |
Improved Flow Control For Minimal Fully Adaptive Routing In 2d Mesh Noc
9TH INTERNATIONAL WORKSHOP ON NETWORK ON CHIP ARCHITECTURES (NOCARC) Publication In Web Of Science UTM FIRST AUTHOR |
2016 |
Quantification Of Tongue Colour Using Machine Learning In Kampo Medicine
EUROPEAN JOURNAL OF INTEGRATIVE MEDICINE Publication In Web Of Science UTM FIRST AUTHOR |
2016 |
Tongue'S Substance And Coating Recognition Analysis Using Hsv Color
Threshold In Tongue Diagnosis
THE 1ST INTERNATIONAL WORKSHOP ON PATTERN RECOGNITION Conference Paper CORRESPONDING AUTHOR |
2016 |
A Modular Architecture For Dynamically Reconfigurable Middlebox With Customized Reconfiguration Handler
PROCEEDINGS OF THE 2016 FIELD-PROGRAMMABLE TECHNOLOGY (FPT 2016) Conference Paper CO-AUTHOR |
2016 |
Sva Checker Generator For Fpga-Based Verification Platform
2016 IEEE International Symposium on Circuits and Systems (ISCAS) Publication In Scopus UTM FIRST AUTHOR |
2016 |
A Fast And Effective Segmentation Algorithm With Automatic Removal Of Ineffective Features On Tongue Images
JURNAL TEKNOLOGI Publication In Scopus CORRESPONDING AUTHOR |
2016 |
Power-Aware Through-Silicon-Via Minimization By Partitioning Finite State Machine With Datapath
PROCEEDINGS - IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS Publication In Scopus UTM FIRST AUTHOR |
2016 |
Built-In Self Test Power And Test Time Analysis In On-Chip Networks
CIRCUITS SYSTEMS AND SIGNAL PROCESSING Publication In Web Of Science UTM FIRST AUTHOR |
2015 |
Virtual Channel And Switch Allocation For Low Latency Network-On-Chip Routers
2015 IEEE 23RD ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, FCCM 2015 Publication In Scopus CO-AUTHOR |
2015 |
Adaptive Configurable Transactional Memory For Multi-Processor Fpga Platforms
2015 IEEE 23RD ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, FCCM 2015 Publication In Scopus CO-AUTHOR |
2015 |
A Closed-Loop Power Manager For Transmission Power Control In Wireless Network-On-Chip Architecture
JURNAL TEKNOLOGI Publication In Scopus CO-AUTHOR |
2015 |
Low Latency Network-On-Chip Router Microarchitecture Using Request Masking Technique
INTERNATIONAL JOURNAL OF RECONFIGURABLE COMPUTING Publication In Scopus UTM FIRST AUTHOR |
2015 |
Comparative Study Of Electrocardiogram Qrs Complex Detection Algorithm On Field Programmable Gate Array Platform
2014 IEEE CONFERENCE ON BIOMEDICAL ENGINEERING AND SCIENCES (IECBES 2014) Publication In Scopus CO-AUTHOR |
2015 |
A Novel Scan Architecture For Low Power Scan-Based Testing
VLSI DESIGN Publication In Scopus UTM FIRST AUTHOR |
2015 |
Development Of Platform-Independent Web-Based Telecardiology Application For Pilot Case Study
2014 IEEE CONFERENCE ON BIOMEDICAL ENGINEERING AND SCIENCES (IECBES 2014) Publication In Scopus CO-AUTHOR |
2015 |
Rrbox: A Remote Dynamically Reconfigurable Middlebox For Network Protection
THE SECOND INTERNATIONAL SYMPOSIUM ON COMPUTING AND NETWORKING Proceedings CO-AUTHOR |
2014 |
Packet Logging Mechanism For Adaptive Online Fault Detection On Network-On-Chip
PROCEEDINGS - IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS Publication In Scopus CO-AUTHOR |
2014 |
Configurable Version Management Hardware Transactional Memory For Multi-Processor Platform
THE 2014 IAES INTERNATIONAL CONFERENCE ON ELECTRICAL ENGINEERING, COMPUTER SCIENCE AND INFORMATICS (EECSI 2014) Proceedings CO-AUTHOR |
2014 |
Remote Dynamically Reconfigurable Platform Using Netfpga
PROCEEDINGS - IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS Publication In Scopus UTM FIRST AUTHOR |
2014 |
Hardware Transactional Memory On Multi-Processor Fpga Platform
THE IEEE INTERNATIONAL SYMPOSIUM ON CIRCUIT AND SYSTEMS 2014 (ISCASâÃÂÃÂ2014) Publication In Scopus CO-AUTHOR |
2014 |
Feasible Transition Path Generation For Efsm-Based System Testing
IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS Publication In Web Of Science UTM FIRST AUTHOR |
2013 |
Study On Test Compaction In High-Level Automatic Test Pattern Generation (Atpg) Platform
CIRCUITS & SYSTEMS Journal Article Non Citation-Indexed UTM FIRST AUTHOR |
2013 |
A Semi-Analytical Approach To Study The Energy Consumption Of On-Chip Networks Testing
JOURNAL OF LOW POWER ELECTRONICS Publication In Scopus UTM FIRST AUTHOR |
2013 |
Multi-Tap Architecture For Ip Core Testing And Debugging On Network-On-Chip
The 2011 IEEE Region 10 Conference (TENCON 2011) Publication In Web Of Science UTM FIRST AUTHOR |
2011 |
Built-In Self-Test For Functional Register-Transfer Level Using Assignment Decision Diagram
PROCEEDINGS OF THE IEEE TWELFTH INTERNATIONAL WORKSHOP ON RTL AND HIGH LEVEL TESTING (WRTLT'11) Proceedings CO-AUTHOR |
2011 |
A New Design-For-Testability Method Based On Thru-Testability
Journal of Electronic Testing-Theory and Applications Publication In Web Of Science CORRESPONDING AUTHOR |
2011 |
A Network-On-Chip Simulation Framework For Homogeneous Multi-Processor System-On-Chip
PROCEEDINGS OF INTERNATIONAL CONFERENCE ON ASIC Publication In Scopus CO-AUTHOR |
2011 |
A New Class Of Easily Testable Assignment Decision Diagrams
MALAYSIAN JOURNAL OF COMPUTER SCIENCE Publication In Web Of Science CO-AUTHOR |
2010 |
A New Class Of Easily Testable Assignment Decision Diagrams
9th International Workshop on RTL and High Level Testing Conference Paper INDIVIDUAL AUTHOR |
2008 |
A Nonscan Design-For-Testability Method For Register-Transfer-Level Circuits To Guarantee Linear-Depth Time Expansion Models
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Conference Paper INDIVIDUAL AUTHOR |
2008 |
Design For Testability Ii: From High Level Perspective
ADVANCES IN MOCROELECTRONICS Book Chapter CO-AUTHOR |
2008 |
Analysis Of Test Generation Complexity For Stuck-At And Path Delay Faults Based On ¿K-Notation
IEICE Transaction on Information and Systems Journal Article Non Citation-Indexed INDIVIDUAL AUTHOR |
2007 |
An Extended Class Of Acyclically Testable Circuits
IEEE 8th Workshop on RTL and High Level Testing Conference Paper INDIVIDUAL AUTHOR |
2007 |
Legend : IP CATEGORY IP LEVEL
Intellectual Property Name | Grant Register No. | IP Level | IP Category |
---|---|---|---|
A HEART MONITORING DEVICE AND SYSTEM FOR ARRHYTHMIA CLASSIFICATION | NATIONAL | PATENT | |
A SYSTEM AND METHOD FOR IMPLEMENTING A PSEUDOINVERSE COMPUTATION AS A HARDWARE ACCELERATOR | NATIONAL | PATENT | |
A NOVEL SCAN CELL | NATIONAL | PATENT | |
AN INTEGRATED LOW POWER GATING SCAN CELL | NATIONAL | PATENT |
Legend : SESSION LEVEL OF STUDY STATUS SUPERVISION LEVEL
Supervision List |
---|
ALIREZA MONEMI AN ENHANCED LOW LATENCY NETWORK-ON-CHIP ROUTER OPTIMIZED FOR PROTOTYPING ON FIELD PROGRAMMABLE GATE ARRAY PHD GRADUATED CO-SUPERVISOR 2016 |
NORLINA BINTI PARAMAN DESIGN FOR TESTABILITY METHOD AT REGISTER TRANSFER LEVEL PHD GRADUATED CO-SUPERVISOR 2016 |
NUR DIYANA BINTI KAMARUDIN TONGUE DISEASE DIAGNOSIS BASED ON BRIGHTNESS CONFORMABLE MULTIPLIER THRESHOLDING AND K-MEANS SUPPORT VECTOR MACHINE CLASSIFIER PHD GRADUATED SUPERVISOR 2017 |
MAHSHID MOJTABAVI NAEINI POWER MINIMIZATION FOR SCAN-BASED TESTING USING LOW-POWER INTEGRATED DESIGN-FOR-TESTABILITY PHD GRADUATED SUPERVISOR 2017 |
HASLIZA BINTI HASSAN THERMAL SAFE SYSTEM-ON-CHIP TEST SCHEDULING USING DYNAMIC VOLTAGE AND FREQUENCY SCALING PHD GRADUATED SUPERVISOR 2017 |
MAHDIEH NADISENEJANI PHD ON GOING CO-SUPERVISOR |
ILI SHAIRAH BINTI ABDUL HALIM RADIATION TOLERANCE ENHANCEMENT IN CIRCUIT CONFIGURATION AND ARCHITECTURE OF OPTICALLY RECONFIGURABLE GATE ARRAY CHIP PHD GRADUATED CO-SUPERVISOR 2021 |
TAN TZE HON FIELD-PROGRAMMABLE GATE ARRAY BASED FOG ANALYTIC NODE ARCHITECTURE WITH RECONFIGURABLE APPLICATION PLANE PHD GRADUATED CO-SUPERVISOR 2021 |
CHOO HAU SIM REGISTER-TRANSFER-LEVEL HARDWARE TROJAN CLASSIFICATION BOOSTED WITH GATE-LEVEL FEATURES PHD GRADUATED SUPERVISOR 2022 |
NORLINA BINTI PARAMAN A NEW DESIGN-FOR-TESTABILITY METHOD AT HIGH-LEVEL USING ASSIGNMENT DECISION DIAGRAM MASTER GRADUATED CO-SUPERVISOR 2005 |
AYUB CHIN ABDULLAH POWER-AWARE THROUGH-SILICON-VIA MINIMIZATION USING FINITE STATE MACHINE WITH DATAPATH PARTITIONING MASTER GRADUATED SUPERVISOR 2013 |
TAN TZE HON A FIELD-PROGRAMMABLE GATE ARRAY BASED FOG NODE ARCHITECTURE WITH RECONFIGURABLE APPLICATION PLANE MASTER GRADUATED CO-SUPERVISOR 2014 |
JEEVAN A/L SIRKUNAN INTERLEAVED INCREMENTAL DECREMENTAL SUPPORT VECTORMACHINE FOR EMBEDDED APPLICATIONS MASTER GRADUATED CO-SUPERVISOR 2015 |
KHEW HE XIANG TEST PROGRAM MIGRATION FROM A PROPRIETY TEST SYSTEM TO AUTOMATED TEST EQUIPMENT MASTER GRADUATED SUPERVISOR 2017 |
NURITA BINTI MOHAMAD ACCELERATION OF ASSERTATION-BASED VERIFICATION USING FIELD PROGRAMMABLE GATE ARRAY MASTER GRADUATED SUPERVISOR 2017 |
LIM THOL YONG ENHANCED LOCALIZATION WITH ADAPTIVE NORMAL DISTRIBUTION TRANSFORM MONTE CARLO LOCALIZATION FOR MAP BASED NAVIGATION ROBOT MASTER GRADUATED CO-SUPERVISOR 2018 |
MAHDIEH NADISENEJANI ARCHITECTURE-LEVEL POWER-TIME-AREA ESTIMATORS FOR IEEE 1149.1 STRUCTURE IN TESTING INTERCONNECT RESOURCES OF NETWORK-ON-CHIP MASTER GRADUATED CO-SUPERVISOR 2018 |
TAN CHONG YEAM ALGORITHM RESTRUCTURING AND DIRECTIVES CONFIGURATION OF HIGH-LEVEL SYNTHESIS TOWARDS HIGH-PERFOMANCE EXTREME LEARNING MACHINE ACCELERATOR MASTER GRADUATED SUPERVISOR 2019 |
AOI UEDA MASTER CROSS CAMPUS SUPERVISOR |
KOK CHEE HOO GATE-LEVEL HARDWARE TROJAN DETECTION BASED ON TESTABILITY MEASURES AND NETLIST STRUTURAL FEATURES MASTER GRADUATED SUPERVISOR 2019 |
JION HIROSE MASTER CROSS CAMPUS SUPERVISOR |
SARAVID A/L SUCHAAD ETHEREUM BASED BLOCKCHAIN IMPLEMENTATION IN HOME AUTOMATION FOR DECENTRALIZED DEVICE TO DEVICE COMMUNICATION MASTER GRADUATED SUPERVISOR 2022 |
MOHAMAD HAFIZAT BIN ZAINAL ABIDIN OFF-CHAIN SOLUTION FOR SCALABLE BLOCKCHAIN-BASED VEHICULAR NETWORK MASTER GRADUATED SUPERVISOR 2022 |
GANESAN A/L S PATMANATHAN THERMAL-AWARE TEST SCHEDULING FOR THREE-DIMENSIONAL STACKED INTEGRATED CIRCUIT WITH THERMAL-AWARE FLOORPLANNING UNDER RESOURCE AND POWER CONSTRAINTS MASTER ON GOING SUPERVISOR |
LOW WEE LI MASTER ON GOING CO-SUPERVISOR |
LIM WEI LIANG RELIABLE NAND PHYSICAL UNCLONABLE FUNCTION IMPLEMENTATION USING NON-INVASIVE PROGRAM DISTRUBANCE FOR RISC-V INTERNET OF THINGS APPLICATIONS MASTER ON GOING SUPERVISOR |
AHMAD AWALLUDDIN BIN MOHD GHAZALI MASTER ON GOING SUPERVISOR |
TAN JUN LIANG RELIABLE STATIC RANDOM ACCESS MEMORY PHYSICAL UNCLONABLE FUNCTION USING UNSTABLE BITS FOR INTERNET OF THINGS APPLICATION MASTER ON GOING SUPERVISOR |
CHEW YUIN YEE A RELIABLE INTERNET OF THINGS DEVICE AUTHENTICATION WITH ENHANCED DRAM LATENCY PHYSICAL UNCLONABLE FUNCTION MASTER ON GOING SUPERVISOR |
MOHAMAD HIZAMI BIN MOHAMAD HILMI ENHANCING PREDICTIVE ALGORITHM FOR PREDICTING PADDY YIELD BASED ON MACHINE LEARNING MODEL FOR PADDY FIELDS IN MALAYSIA. THIS RESEARCH AIMS TO INVESTIGATE THE APPLICATION OF MACHINE LEARNING PREDICTIVE ANALYTICS, SPECIFICALLY UTILIZING THE SUPPORT VECTOR MACHINES (SVM) ALGORITHM, FOR THE PREDICTION OF PADDY YIELDS IN MALAYSIA, SPECIFICALLY IN PADDY FIELDS OF KUALA MUDA, KEDAH. THE PRIMARY FOCUS OF THE MALAYSIAN GOVERNMENT IS TO ENHANCE SELF-SUFFICIENCY IN RICE PRODUCTION TO ENSURE ECONOMIC AND SOCIAL STABILITY. WHILE PADDY-PRODUCING COUNTRIES LIKE CHINA, INDIA, AND SOUTH KOREA HAVE MADE SIGNIFICANT STRIDES IN IMPLEMENTING MACHINE LEARNING FOR YIELD PREDICTION, SUCH INITIATIVES ARE NOTABLY ABSENT IN MALAYSIA. THIS STUDY'S OBJECTIVES ARE THREEFOLD: FIRST, TO GATHER INPUT (TEMPERATURE, HUMIDITY AND RAINFALL) AND OUTPUT DATA (PADDY YIELD) FROM REPUTABLE SOURCES SUCH AS MADA, THE MALAYSIA METEOROLOGICAL DEPARTMENT, AND ONLINE CLIMATE SOURCES; SECOND, TO DEVELOP A PREDICTIVE MACHINE LEARNING MODEL BASED ON THE SVM ALGORITHM USING THE COLLECTED INPUT VARIABLES TO FORECAST PADDY YIELDS; AND FINALLY, TO ENHANCE THE ACCURACY OF THE SVM MODEL BY A TARGET OF 5%. THE LATTER OBJECTIVE IS CURRENTLY UNDER DEVELOPMENT WITH MEASURES TO IMPROVE SVM ACCURACY BEING DEVISED. THIS RESEARCH SEEKS TO DEMONSTRATE HOW MACHINE LEARNING CAN ENHANCE PADDY YIELD FORECASTING IN MALAYSIA, OFFERING VALUABLE INSIGHTS FOR THE AGRICULTURAL SECTOR AND PAVING THE WAY FOR SUSTAINABLE FARMING PRACTICES AND ENHANCED FOOD SECURITY. CURRENTLY, DATA COLLECTION ACTIVITIES ARE BEING CONDUCTED TOGETHER WITH SVM MODEL STUDIES DEVELOPMENT. MODEL IMPROVEMENT MEASURES ARE ALSO TO BE STUDIED FROM VARIOUS LITERATURE SOURCES.   MASTER ON GOING CO-SUPERVISOR |
KHAIRUL SHAZWAN BIN MAMAT SCAN BASED ATTACK RESISTANCE USING PUF OBFUSCATION DESIGN FOR SECURE SCAN TEST   MASTER ON GOING SUPERVISOR |